/*****************************************************************************/
/**
*
* @file bsp_clkconfig.c
*
* Clock reconfiguration functions about stm32.
* Target device: STM32F103.
*
* <pre>
* MODIFICATION HISTORY:
*
* Ver   Who    Date   	Changes
* ----- ---- ---------- -------------------------------------------------------
* 0.01  abu  02/29/2020 Created
* </pre>
*
*------------------------------------------------------------------------------
* Author:	abu
*					E-mail:	abu_liu@opencores.org
*------------------------------------------------------------------------------
*
******************************************************************************/

/***************************** Include Files *********************************/
#include "bsp_led.h"

/************************** Function Prototypes ******************************/

/*****************************************************************************/
/**
*
* @brief	Set internal clock.
*
* @param	None.
* @param  None.	
*
* @return	None.
*
* @note		None.
*
******************************************************************************/
void HSI_SetSysClock(uint32_t pllmul)
{
	volatile uint32_t HSIStartUpStatus = 0;

	RCC_DeInit();	//reset RCC
	RCC_HSICmd(ENABLE);	//enable HSI
	
	HSIStartUpStatus = RCC->CR & RCC_CR_HSIRDY;

	if(HSIStartUpStatus == RCC_CR_HSIRDY)
		{
		FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
		FLASH_SetLatency(FLASH_Latency_2);
		RCC_HCLKConfig(RCC_SYSCLK_Div1);
		RCC_PCLK2Config(RCC_HCLK_Div1);
		RCC_PCLK1Config(RCC_HCLK_Div2);
		RCC_PLLConfig(RCC_PLLSource_HSI_Div2, pllmul);
		RCC_PLLCmd(ENABLE);

		//wait for pll to be stable
		while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET){}

		//after pll is stable, set pll as system clock
		RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);

		//wait for PLLCLK to be selected as system clock.
		while (RCC_GetSYSCLKSource() != 0x08){}
	}
	else
		{
			//if HSI is failed to open, procedure will stop here.
			//add your code below here to fix the problem.
			while(1){}
		}

}
